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SUMMER CLASSES

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SUSIE - 2017
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SUSIE FORM
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BASIC COMPUTER COURSE-2017

FOUNDATION COURSE IN MATHEMATICS

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Digital Signal Processing using FPGA

(8-Sundays workshop with Hands on training)

Commencing from Sunday 06 Jun 2010 from 2pm-5pm

Contents:-

1. Digital Signal Processing basics and evolution

2. DSP Architecture and needs

3. FPGA Architecture and Features

4. VHDL for DSP Implementation on FPGA

5. Simulation and Implementation on FPGA

6. Motion and Simulation Interface

7. IPs (FIR, FFT,NCO RS Encoder/Decoder)Implementation

8. Hardware Demo including Programming of FPGA

The above includes Lab Sessions


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Faculty: From reputed institutions IISc, LRDE, ISRO, ADA and Premier education institutions.
Days: Saturdays and Sundays
Timing: flexible
Course details & Fees: Contact Hony. Secretary at 080-2333 1133, 080-2333 7231
(including Course material in CD & coffee)
Duration: Three hours /day (4days to 10 days)
Venue: IETE Bangalore Centre
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AGM-2017 Notice

Minutes of
AGM-16

Balance Sheet

Annual Report
2016 - 2017

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